1. Field of the Invention
The present invention relates to means for generating high voltage and in particular to dc-dc converters having a large power-handling capacity.
2. Description of the Prior Art
High power voltage multiplication by means of conventional transformers, although adequate for many uses, is often found disadvantageous for applications involving a weight penalty. Such applications are numerous and encountered most obviously in flight and space systems, including avionics, airborne radar and satellite high voltage supply. Transformers are physically limited to relatively low frequency operation, generally up to 50 kHz, by stray capacitances among transformer windings and between the windings and core. Transformer weight and operating frequency are in turn inversely related, reflecting the increased amount of core required to contain the increased magnetic flux of the lower operating frequencies.
A solution to the frequency limitation (and the weight problem associated therewith) has been the use of the full or half wave single phase capacitor-diode voltage multiplier (CDVM). This multiplier commonly comprises a number of identical cascaded stages of capacitor-diode "cells". Voltages maintained upon the charged capacitors add serially with the high level input voltage to produce a multiple of the input. A number of limitations become evident when higher power systems attempt to utilize the single phase CDVM. Present day components limit the practical power capability of the single phase CDVM. Increased power demands have been occasioned by developments in the traveling wave tube, ion engine and cathode ray tube technologies, for example. Present day capacitors of metallized paper, metallized film and ceramic dielectrics often require an unacceptably large design to handle large single phase CDVM high power currents. Although developments in the areas of polycarbonate and polysulfone dielectrics (see, for example, "Technological Development of High Energy Density Capacitors", Robert D. Parker, NAS 3-18925 (1976)) may lead to smaller films of given capacity, capacitor size constraints will always place a limit upon the power handling capability of the CDVM.
Attempts have been made to increase high frequency voltage multiplier power handling capability by, for example, the parallel grouping of a number of single phase, M-stage CDVM's. Problems have been found to arise from such combination with regard to current sharing among the various CDVMs, resulting in suboptimal design.